面向通用GPU虚拟化多任务的三维堆叠存储架构研究
序号 | 标题 | 类型 | 作者 |
---|---|---|---|
1 | Energy-Efficient eDRAM-Based On-Chip Storage Architecture for GPGPUs | 期刊论文 | Jing Naifeng;Jiang Li;Zhang Tao;Li Chao;Fan Fengfeng;Liang Xiaoyao |
2 | Bank Stealing for Conflict Mitigation in GPGPU Register File | 会议论文 | Jing Naifeng;Chen Shuang;Jiang Shunning;Jiang Li;Li Chao;Liang Xiaoyao |
3 | On Quality Trade-off Control for Approximate Computing Using Iterative Training | 会议论文 | Chengwen Xu;Xiangyu Wu;Wenqi Yin;Qiang Xu;Naifeng Jing;Xiaoyao Liang;Li Jiang |
4 | Bank Stealing for a Compact and Efficient Register File Architecture in GPGPU | 期刊论文 | Jing Naifeng;Jiang Shunning;Chen Shuang;Zhang Jingjie;Jiang Li;Li Chao;Liang Xiaoyao |
5 | Applying Victim Cache in High Performance GPGPU Computing | 会议论文 | Fan Fengfeng;Wang Jianfei;Jiang Li;Liang Xiaoyao;Jing Naifeng |
6 | IBOM: An Integrated and Balanced On-Chip Memory for High Performance GPGPUs | 期刊论文 | Jianfei Wang;Qin Wang;Li Jiang;Chao Li;Xiaoyao Liang;Naifeng Jing |
7 | Resource-Saving Compile Flow for Coarse-Grained Reconfigurable Architectures | 会议论文 | Zhao Zhongyuan;Sheng Weiguang;Jing NaiFeng;He Weifeng;Mao ZhiGang |
8 | EnablingIn-Situ Logic-In-Memory Capability Using Resistive-RAM Crossbar Memory | 会议论文 | Jing Naifeng;Li Taozhong;Zhao Zhongyuan;Jin Wei;Sun Yanan;He Weifeng;Mao Zhigang |
9 | CNFET-Based High Throughput SIMD Architecture | 期刊论文 | Li Jiang;Tianjian Li;Naifeng Jing;Nam Sung Kim;Mingyi Guo;Xiaoyao Liang |
10 | Buddy SM: Sharing Pipeline Front-End for Improved Energy Efficiency in GPGPUs | 期刊论文 | Zhang Tao;Jing Naifeng;Jiang Kaiming;Shu Wei;Wu Min-You;Liang Xiaoyao |
11 | Redundancy based Interconnect Duplication to Mitigate Soft Errors in SRAM-based FPGAs | 会议论文 | Jing Naifeng;Zhou Jiacheng;Jiang Jianfei;Chen Xin;He Weifeng;Mao Zhigang |
12 | Incorporating selective victim cache into GPGPU for high-performance computing | 期刊论文 | Jianfen Wang;Fengfeng Fan;Li Jiang;Xiaoyao Liang;Naifeng Jing |
13 | CGSharing: Efficient Content Sharing in GPU-Based Cloud Gaming | 会议论文 | Wu Xiangyu;Xia Yuanfang;Jing Naifeng;Liang Xiaoyao |
14 | Cache-Emulated Register File: An Integrated On-Chip Memory Architecture for High Performance GPGPUs | 会议论文 | Jing Naifeng;Wang Jianfei;Fan Fengfeng;Yu Wenkang;Jiang Li;Li Chao;Liang Xiaoyao |
15 | In-Place Resynthesis and Remapping Techniques for Soft Error Mitigation in FPGA | 专利 | Lei He;Ju-Yueh Lee;Zhe Feng;Naifeng Jing |
16 | 一种现场可编程门阵列软错误容错方法及结构 | 专利 | 景乃锋;蒋剑飞;李桃中;何卫锋;赵元富;陈雷;李学武;王硕;周婧;毛志刚 |
17 | 基于多层次异构结构的可重构架构的并行扩展方法 | 专利 | 楼杰超;绳伟光;何卫锋;景乃锋;蒋剑飞;毛志刚 |
18 | 基于冗余互连资源的FPGA单粒子翻转软错误检测方法 | 专利 | 熊力孚;景乃锋;周家成;何卫锋;毛志刚 |